•ARM – Acorn RISC Machine(1983–1985)
–Acorn Computers Limited, Cambridge, England
•ARM – Advanced RISC Machine 1990
–ARM Limited, 1990
–ARM has been licensed to many semiconductor
manufacturers
•Key component of many 32 – bit embedded systems
•Portable Consumer devices
•ARM1 prototype in 1985
•One of the ARM’s most successful cores is the
ARM7TDMI,provides high code density and low power consumption
Advanced RISC
Machines
•ARM Core uses a RISC architecture
•ARM is Physical hardware design company.
•ARM licenses its cores out and other companies make processors based on its cores
Companies
licensing with ARM
•3com
•Agilent Technologies
•Altera
•Epson
•Freescale
•Fijitsu
•NEC
•Nokia
•Intel
•IBM
•Microsoft
•Motorola
•Panasonic
•Qualcomm
•Sharp
•Sanyo
•Sun Microsystems
•Sony
•Symbian
•Texas Instruments
•Toshiba
•Wipro
The RISC Design
Philosophy
•RISC is characterized by limited number of
instructions
•A complex instruction is obtained as a sequence of
simple instructions.In RISC processor software is complex but the
processor architecture is simple
•Large number of registers are required.
•Pipelined instruction execution
Ex : ARM, ATMEL AVR, MIPS, Power PC etc.
The CISC Design
Philosophy
•CISC is characterized by large instruction set.
•The aim of designing CISC processors is to reduce
software complexity by increasing the complexity of processor architecture.
•Very small number of registers are available.
Ex : Intel X86 family, Motorola 68000 series.
CISC vs. RISC
RISC Design Rules
•Instructions
•Pipelines
•Registers
•Load – Store Architecture
• Instructions
–Reduced Number of Instructions–Execute in a single cycle–The compiler synthesizes complicated operations–Each instruction is a fixed length
•Pipelines
–The processing of instructions is broken down into
smaller units that can be executed in parallel by pipelines–Pipeline advances by one step on each cycle for
maximum throughput
• Registers
–Have a large general purpose register set–Any register can contain either data or address
Load Store
Architecture
•Memory can be accessed only through two dedicated
instructions–LDR ; move
word from memory to register–STR ; move
word from register to memory•All other instructions have to work on registers
only.
ARM Design
Policy
•Reduce power consumption
•High code density
•Price sensitive
•Reduce the area of the die taken up by the embedded processor
•ARM Incorporated hardware debug technology
Instruction set
for Embedded Systems
•Variable cycle execution for certain instructions
•Inline barrel shifter leading to more complex
instructions
•Thumb 16 – bit instructions
•Conditional execution
•Enhanced Instructions
